1. Field of the Invention
The present invention relates to a display device, and more particularly to a liquid crystal display. Although the present invention is suitable for a wide scope of applications, it is particularly suitable for increasing resolution.
2. Description of the Related Art
Silicon is generally classified into amorphous silicon, polycrystalline silicon, and monocrystalline in accordance with a crystallization state of the silicon. The amorphous silicon can be deposited as a thin film at a low temperature of 350° C. or less. Because amorphous silicon can be deposited at a low temperature, amorphous silicon is typically used as a thin film transistor (hereinafter, referred to as ‘TFT’) for a liquid crystal display device. As size of liquid crystal displays increases, materials with fast electrical characteristics are required to drive large-sized liquid crystal displays. Thus, amorphous silicon can not be used in large-sized liquid crystal display devices, since amorphous silicon has a low mobility of 0.5 cm2/Vs or less.
Polycrystalline silicon (polysilicon) has a high mobility from several tens of cm2/Vs to several hundreds of cm2/Vs. Realizing large-sized liquid crystal display device by using polysilicon as the semiconductor layer in a TFT has been actively researched. By using a polysilicon TFT in the liquid crystal display device, there is an advantage in that the drive IC and the TFT array substrate of the display area can be integrated into the same substrate.
A sequential lateral solidification (hereinafter, referring to as ‘SLS’) of silicon in which an excimer laser is irradiated onto an amorphous silicon thin film to completely melt the thin film and crystallize from the side in a cooling process is mainly used as a method of forming polysilicon. During the cooling process, crystalline striations extend from the sides and grain boundaries extend between the striations. In the case of a TFT using polysilicon, the electrical characteristic of channel mobility is limited by a grain boundary in the channel area of the TFT. To improve the electrical characteristic of the TFT using polysilicon, the orientation of the grain boundaries in the channel should be controlled such that the number of the grain boundaries traverse by current flow in the channel area is minimized. Such a control of the orientation of the grain boundaries can be done by crystallizing the amorphous silicon directionally with the SLS method. In other words, the amorphous silicon is directional crystallized using the SLS process to minimize the grain boundaries traversed by a current in the channel, thereby increasing the mobility of the channel. As a result, the electrical characteristic of the TFT is improved by use of the directionally grown polysilicon. The electrical characteristic of the TFT being dependent upon the grain boundary direction in the channel will be explained in conjunction with FIGS. 1 and 2.
FIG. 1 is a diagram representing polysilicon in the active layer of a liquid crystal display device in the related art. More specifically, FIG. 1 represents a case 1 when a current direction of the TFT channel is parallel to the direction of the grain boundaries, a case 2 when a current direction of the TFT channel forms a 45° angle with the direction of grain boundaries, and a case 3 when a current direction of the TFT channel forms a right angle with the direction of the grain boundaries. The TFT characteristics of the three cases for the current direction of the TFT channel with respect to the direction of the grain boundaries shown in FIG. 1 are given in Table 1. Hereinafter, the term “channel direction” is the current direction in the channel area. Further, the term “grain boundary direction” is the direction of grain boundaries.
TABLE 11 Solid Line2 Dotted Line3 Dashed LineChannel OrientParallel45 degree90 degreeMisOrientedMisOrientedMobility340 cm2/v · sec230 cm2/v · sec140 cm2/v · secVth1.3 V1.3 V2.0 VS-Factor0.45 V/dec0.44 V/dec1.56 V/dec
As shown in Table 1, the polysilicon TFT is known to be different in accordance with the channel direction of the TFT with respect to the grain boundary direction of the polysilicon. Further, polysilicon TFT's within the panel having the same channel direction with respect to the grain boundary direction of the polysiliicon will all have similar electrical characteristics. The highest mobility is when the channel direction of a TFT is parallel to the grain boundary direction of the polysilicon in the channel area. The mobility depends on the number of the grain boundaries or the density of the grain boundaries when the channel direction of a TFT is parallel to the grain boundary direction of the polysilicon.
FIG. 2 is a graph representing a current characteristic for a voltage in the three cases of FIG. 1. As shown in FIG. 2, case 1 is a solid line for when a channel direction of the TFT is parallel to the direction of the grain boundary direction of the polysilicon in the channel area, case 2 is a dotted line for when a channel direction of the TFT forms a 45° angle with the direction of the grain boundary direction of the polysilicon in the channel area, case 3 is a dashed line when a channel direction of the TFT forms a right angle with the direction of the grain boundary direction of the polysilicon in the channel area, and when a drain voltage Vd is 10V and 0.1V respectively. Further, the x axis represents a gate voltage Vg and the y axis represents a drain voltage Id.
As shown in FIG. 2, a sub-threshold slope and a threshold voltage Vth are known to depend on the density of the grain boundary direction of the polysilicon in the channel area. The sub-threshold slope is an S shape in Table 1. If a gate voltage is increased slowly in the TFT, the current increase from a voltage below the threshold voltage to finally reach an on-current Ion that drives the TFT, and the sub-threshold slope is an increased amount of the gate voltage when the current is increased ten times from the voltage below the threshold voltage.
In the case when a channel direction of the TFT is parallel to the grain boundary direction of the polysilicon in the channel area such that the number of grain boundaries is minimized in the channel area, the threshold voltage becomes 1.1V and the sub-threshold slope becomes 0.46V/dec. Further, in the case when a channel direction of the TFT forms a right angle with the grain boundary direction of the polysilicon in the channel area such that the number of grain boundaries is maximized in the channel area, the threshold voltage becomes 2.0V and the sub-threshold slope becomes 0.56V/dec. In the case when a channel direction of the TFT forms a 45° angle with the grain boundary direction of the polysilicon in the channel area such that the number of grain boundaries has an intermediate value between the two above cases in the channel area, the threshold voltage becomes 1.4V and the sub-threshold slope becomes 0.47V/dec. Thus, the sub-threshold slope and the threshold voltage depend on the density of the grain boundaries in the channel area.
FIG. 3 is a diagram representing the directions for the current and grain boundaries in the channel area of a thin film transistor in the liquid crystal display device of the related art. All of the channel directions in the channels of TFTs within an LCD panel are typically formed to be parallel to the directions of the grain boundaries in the channel areas' of the TFTs, such as the crystallization growing direction, as shown in FIG. 3. However, to form the polysilicon so that the grain boundaries are in the same direction as the channel direction of the TFTs decreases the layout freedom for the TFTs such that fewer devices can be integrated into an area. The decreased integration can cause other problems. For example, it the area for the drive circuit part of a display panel, which is integrated into the display panel, is increased; the aperture ratio of the pixel is decreased in the case of a high resolution display panel.